Cypress Semiconductor /psoc63 /SAR /MUX_SWITCH_CLEAR0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MUX_SWITCH_CLEAR0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MUX_FW_P0_VPLUS)MUX_FW_P0_VPLUS 0 (MUX_FW_P1_VPLUS)MUX_FW_P1_VPLUS 0 (MUX_FW_P2_VPLUS)MUX_FW_P2_VPLUS 0 (MUX_FW_P3_VPLUS)MUX_FW_P3_VPLUS 0 (MUX_FW_P4_VPLUS)MUX_FW_P4_VPLUS 0 (MUX_FW_P5_VPLUS)MUX_FW_P5_VPLUS 0 (MUX_FW_P6_VPLUS)MUX_FW_P6_VPLUS 0 (MUX_FW_P7_VPLUS)MUX_FW_P7_VPLUS 0 (MUX_FW_P0_VMINUS)MUX_FW_P0_VMINUS 0 (MUX_FW_P1_VMINUS)MUX_FW_P1_VMINUS 0 (MUX_FW_P2_VMINUS)MUX_FW_P2_VMINUS 0 (MUX_FW_P3_VMINUS)MUX_FW_P3_VMINUS 0 (MUX_FW_P4_VMINUS)MUX_FW_P4_VMINUS 0 (MUX_FW_P5_VMINUS)MUX_FW_P5_VMINUS 0 (MUX_FW_P6_VMINUS)MUX_FW_P6_VMINUS 0 (MUX_FW_P7_VMINUS)MUX_FW_P7_VMINUS 0 (MUX_FW_VSSA_VMINUS)MUX_FW_VSSA_VMINUS 0 (MUX_FW_TEMP_VPLUS)MUX_FW_TEMP_VPLUS 0 (MUX_FW_AMUXBUSA_VPLUS)MUX_FW_AMUXBUSA_VPLUS 0 (MUX_FW_AMUXBUSB_VPLUS)MUX_FW_AMUXBUSB_VPLUS 0 (MUX_FW_AMUXBUSA_VMINUS)MUX_FW_AMUXBUSA_VMINUS 0 (MUX_FW_AMUXBUSB_VMINUS)MUX_FW_AMUXBUSB_VMINUS 0 (MUX_FW_SARBUS0_VPLUS)MUX_FW_SARBUS0_VPLUS 0 (MUX_FW_SARBUS1_VPLUS)MUX_FW_SARBUS1_VPLUS 0 (MUX_FW_SARBUS0_VMINUS)MUX_FW_SARBUS0_VMINUS 0 (MUX_FW_SARBUS1_VMINUS)MUX_FW_SARBUS1_VMINUS 0 (MUX_FW_P4_COREIO0)MUX_FW_P4_COREIO0 0 (MUX_FW_P5_COREIO1)MUX_FW_P5_COREIO1 0 (MUX_FW_P6_COREIO2)MUX_FW_P6_COREIO2 0 (MUX_FW_P7_COREIO3)MUX_FW_P7_COREIO3

Description

SARMUX Firmware switch control clear

Fields

MUX_FW_P0_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P1_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P2_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P3_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P4_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P5_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P6_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P7_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P0_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P1_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P2_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P3_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P4_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P5_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P6_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P7_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_VSSA_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_TEMP_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_AMUXBUSA_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_AMUXBUSB_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_AMUXBUSA_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_AMUXBUSB_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_SARBUS0_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_SARBUS1_VPLUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_SARBUS0_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_SARBUS1_VMINUS

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P4_COREIO0

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P5_COREIO1

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P6_COREIO2

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

MUX_FW_P7_COREIO3

Write ‘1’ to clear corresponding bit in MUX_SWITCH0

Links

() ()